1. Field of the Invention
The present invention relates to a method of forming a crystalline silicon film formed on an insulating substrate of glass or the like, a semiconductor substrate of a single crystal silicon substrate or the like. Particularly, the present invention relates to a method of providing a crystalline silicon film in a preferable crystal state in which in a method of crystallizing an amorphous silicon film by annealing, horizontal growth is performed by using a catalyst element promoting crystallization (nickel or the like).
2. Description of Prior Art
A crystalline silicon film is a material indispensable in a semiconductor element of a thin film transistor or the like. It has been known in recent years that a silicon film having excellent crystalline performance can be obtained at a lower temperature in a short period of time by using a metal element having a function of promoting to crystallize an amorphous silicon film (catalyst element). Nickel (Ni), platinum (Pt), palladium (Pd), copper (Cu). silver (Ag), iron (Fe) or the like is effective as the catalyst element.
Particularly, there has been known a technology of providing a silicon film having a crystal structure preferable to an element by controlling a direction of crystal growth by nonselectively introducing a catalyst element (for example, Japanese Unexamined Patent Publication Nos. JP-A-7-45519 and JP-A-8-213634). The technology is referred to as a horizontal growth process. According lo the horizontal growth process, crystal grain boundaries are present in parallel with a direction of growth and the effect of the grain boundaries can be lowered to a limit thereof by making a direction of current of an element in parallel with the direction of growth. As a result, a characteristic equivalent to that of a single crystal material can be provided even for a polycrystal material.
A simple explanation will be given of the horizontal growth process. According to the horizontal growth process, a mask film of silicon oxide or the like is formed on an amorphous silicon film and a window is selectively formed in the film. A catalyst element is introduced from the window. In FIG. 1(A), the window is designated by numeral 11. Further, a film of a catalyst element per se or a compound thereof is formed by various methods of a sputtering process (Japanese Unexamined Patent Publication Nos. JP-A-7-45519 and JP-A-7-66425) a gas phase growth process (Japanese Unexamined Patent Publication No. JP-A-7-335548), a coating process (Japanese Unexamined Patent Publication No. JP-A-7-130652) and the like.
Further, when crystallization is performed by carrying out an annealing process, a region (horizontal growth region) 13 of crystalline silicon is widened centering on the window. This is caused since the catalyst element makes the amorphous silicon film crystallize while diffusing in the silicon film. Generally, the higher the temperature, the longer the time period, the further the crystallization is progressed. (FIG. 1(A): details are described in Japanese Unexamined Patent Publications, mentioned above.)
By arranging the direction of horizontal growth in relation with a direction of flowing current in a semiconductor element such as a thin film transistor (TFT), the characteristic of the semiconductor can be promoted. That is, there are several variations in arranging TFT. One of the variations is shown by FIG. 3. In FIG. 3, numeral 301 designates a window portion to which a catalyst element is added and a crystallized region 302 is widened by horizontal growth at the surrounding of the window centering on the window portion.
In this case, when the window portion 301 is provided with a rectangular shape, a horizontal growth region in an elliptic shape is formed as shown by FIG. 3. in that case, a gate electrode 304 may be made substantially in parallel with the region 301 as shown by TFT1 of FIG. 3 and crystal growth may be carried out in a direction of from a drain 305 to a source 303 or in a reverse direction thereof.
Further, as shown by TFT2 of FIG. 3, a gate electrode 307 may be arranged substantially orthogonally to the region 301 and crystal growth may be carried out substantially simultaneously at a source 306 and a drain 308. As a characteristic of TFT, according to the former method, ON current is large since directions of crystal growth and current are in parallel with each other and according to the latter method, OFF current is large since the directions of crystal growth and current are orthogonal to each other. (FIG. 3)
Further, the catalyst element may be added linearly by forming the window in a linear shape. FIGS. 4(A) and 4(B) show an example where catalyst adding regions 401 and 406 are provided in parallel with gate lines 402 and 407 in a circuit including a number of TFTs. FIG. 4(A) corresponds to TFT2 of FIG. 3 where the catalyst element is added substantially orthogonally to gate electrodes of TFTs 403 through 405. FIG. 4(B) corresponds to TFT1 of FIG. 3 where the catalyst element is added substantially in parallel with gate electrodes of TFTs 408 through 410. (FIGS. 4(A) and 4(B))
Such a control of the direction of crystal growth by means of the horizontal growth process is effective in a high degree semiconductor integrated circuit where elements to which mutually contradictory functions are requested, are formed on the same substrate. FIG. 5 shows a block diagram of a monolithic type active matrix circuit used in a liquid crystal display. A source driver (row driver) and a gate driver (column driver) are installed as peripheral driver circuits.
Further, a number of pixel circuits comprising transistors for switching and capacitors are formed in the active matrix circuit (pixel) region and pixel transistors of the matrix circuit and the peripheral driver circuits are connected to each other by source lines and gate lines having numbers the same as a number of rows and a number of columns. High speed operation is requested to TFTs used in the peripheral circuits, particularly peripheral logical circuits of shift resistors and the like and accordingly, large current (ON current) and small dispersion are requested in selecting operation.
Meanwhile, it is requested to TFTs used in the pixel circuit that leakage current (also referred to as OFF current) is sufficiently low and dispersion is small in nonselecting operation, that is, when reverse bias voltage is applied to gate electrodes such that electric charge accumulated in capacitors are held for a long period of time. Specifically, it is requested that OFF current is equal to or lower than 1 pA and dispersion is within one digit. Conversely, rot so large ON current is needed.
As described above, TFTs having physically contradictory characteristics of high ON current and low leakage current, and small dispersion of these, are formed on the same substrate at the same time. However, it is easily understood that such requirements are very difficult to satisfy technically according to a normal crystallizing process.
By contrast, when the crystallizing direction is controlled by the horizontal growth process, these problems can be resolved (Japanese Unexamined Patent Publication No. JP-A-8-213634). In this way, the effectiveness of the horizontal growth process using the catalyst element is shown.
Ideally, when annealing operation is carried out at a higher temperature for a longer period of time, infinitely large horizontal growth can be provided, however, in that case, it has been observed that although the region of horizontal growth is enlarged, the quality of crystals is deteriorated as a whole. The behavior is shown by FIG. 1(B). FIG. 1(B) shows a behavior of continuing horizontal growth further from a state shown by FIG. 1(A) where the horizontal growth region 13 is enlarged to a portion of an ellipse of a bold line designated by numeral 14 (in the case of FIG. 1(A), a portion of an ellipse of a dotted line designated by numeral 12 in the figure).
However, regions where disturbance in crystalline performance is caused (indicated by black points 15 in FIG. 1(B)) emerge particularly at portions remote from the window. (FIG. 1(B))
Generally, the concentration of the catalyst element is high at the window 11 and a vicinity thereof and it is preferable to avoid a situation where the region overlaps major portions of elements. According to the current technology, in the horizontal growth process using nickel as a catalyst element, the width of horizontal growth having no disturbance of crystals is 50 through 60 Mm at a maximum, however, when an element is enlarged, the horizontal growth region needs to be enlarged further. It is an object of the present invention to provide annealing conditions for obtaining a larger horizontal growth region while reducing a deterioration in the crystalline performance.
According to crystallization by means of a conventional annealing process, the larger the irregularities of a substrate, the easier the crystallization is performed and the shorter the crystal growth time period. This seems to be due to the fact that the irregularities function as nuclei of crystallization.
However, the inventors have found from various experimental results that in the horizontal growth process, the irregularities of the substrate deteriorate the quality of crystals and lowers the rate of horizontal growth and therefore, the smaller the irregularities of the substrate as less as possible, the more preferable.
According to a research by the inventors, it has been clarified that the quality of crystals can sufficiently be promoted when a root mean square of a surface roughness of an underlayer film or a substrate that is brought into contact with a bottom face of an amorphous silicon film which is intended to crystallize by a horizontal growth process is smaller than a thickness of the amorphous silicon film.
The result is an epoch making discovery in view of the fact that conditions which have been regarded as disadvantageous according to the conventional crystallizing technology are preferable conditions.
Further, preferable conditions are provided in respect of the density of projections present on the substrate or the underlayer film. The main reason for interrupting horizontal growth when the horizontal growth is carried out on an ideal substrate resides in generation of nuclei caused by natural crystallization (crystallization not dependent upon the operation of catalyst element) of the amorphous silicon film.
A time period of initializing natural crystallization at a specific annealing temperature can be specified. When the annealing operations performed for a time period exceeding the above-described time period, the horizontal growth is interrupted by natural crystallization and therefore, a maximum horizontal growth distance is determined by the annealing temperature.
An equation of a relationship between an annealing temperature and an annealing time period under a critical condition of natural crystallization is specified below.
t=f (T) (T: annealing temperature, t: annealing time period)
For example, when an amorphous silicon film having a surface roughness of 80 nm (rms: root mean square) is annealed at 600xc2x0 C., the amorphous silicon is naturally crystallized in 4 hours. Similar investigation has been performed in respect of other temperature by which, for example, the result shown by FIG. 1(C) is obtained.
The curve generally differs in accordance with the fabrication method even with the same amorphous silicon film. For example, an amorphous silicon film produced by low pressure CVD process is difficult to crystallize more than an amorphous silicon film produced by plasma CVD process and the curve is moved to the upper right direction.
Further, an equation of a relationship between the annealing temperature and a distance of growth is specified below.
x=g (T, t) (x: distance of growth)
A maximum horizontal growth distance x0 at an annealing temperature T0 is obtained as specified below.
x0=g (T, f(T))
Incidentally, the maximum horizontal growth distance signifies a conceptual meaning where no defects are present in crystals which is not the same as an actual horizontal growth distance.
Accordingly, the horizontal growth up to x0 can be carried out when factors of interrupting the horizontal growth are not present other than natural crystallization. However, in the actual horizontal growth, projections (defects or dirts of substrate) are present at a substrate or an underlayer and therefore, when the horizontal growth as far as the maximum horizontal growth distance is carried out, many defects are revealed.
Therefore, there is provided a condition in respect of hazard of horizontal growth such as projections on a substrate or an underlayer film or the like. That is, when the density of projections is equal to or lower than a reciprocal number of a square of x0, or,
g(T, f (T0))xe2x88x922,
the factor of substantially interrupting the horizontal growth is limited to occurrence of nuclei caused by natural crystallization.
A substrate xe2x80x9caxe2x80x9d having a surface roughness of 80 nm and a substrate xe2x80x9cbxe2x80x9d having a surface roughness of 5 nm are shown in FIGS. 1(C) and 1(D) and natural crystallization is liable to occur clearly in the case of the substrate xe2x80x9caxe2x80x9d. Further, the rate of horizontal growth is smaller in the case of the substrate xe2x80x9caxe2x80x9d. Typically, the rate of horizontal growth of the substrate xe2x80x9caxe2x80x9d is about ⅔ times as much as that of the substrate xe2x80x9cbxe2x80x9d. Accordingly, a substrate having a smaller surface roughness is more preferable in view of horizontal growth. However, since the maximum horizontal growth distance of the substrate xe2x80x9cbxe2x80x9d is larger by that amount, unless the density of projections of the substrate is made smaller in accordance therewith, the flatness cannot be utilized usefully.
Conversely, the maximum horizontal growth distance is smaller in the case of the substrate xe2x80x9caxe2x80x9d and therefore, however smaller the density of projection of the substrate xe2x80x9caxe2x80x9d than that of the substrate xe2x80x9cbxe2x80x9d, it is difficult to promote the quality of crystals over a large area.
According to the present invention, as a method of measuring (a method of determining) a critical point of natural crystallization, observation by using an optical microscope, observation by using an electron microscope, observation by a spectroscopic method (for example, Raman spectroscopy) and the like are effective. However, caution is required to the fact that equations of relationships determined by the respective methods does not necessarily coincide with each other.
Further, in either of natural crystallization and horizontal growth, when thicknesses of a substrate, an underlayer and an amorphous silicon film, methods of film formation thereof, a cap film (a mask film) and the like are varied, the above-described relationship between temperature and time is also varied. Accordingly, in establishing a relationship equation xe2x80x9cgxe2x80x9d, conditions the same as those of an object of an amorphous silicon film must be established. Further, in determining xe2x80x9cfxe2x80x9d, it is effective to cover an amorphous silicon film with a mask film used in horizontal growth.